Zephyr API Documentation
4.0.0-rc2
A Scalable Open Source RTOS
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max32-pinctrl.h
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/*
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* Copyright (c) 2023-2024 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_
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#define MAX32_MODE_GPIO 0x00
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#define MAX32_MODE_AF1 0x01
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#define MAX32_MODE_AF2 0x02
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#define MAX32_MODE_AF3 0x03
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#define MAX32_MODE_AF4 0x04
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#define MAX32_MODE_AF5 0x05
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#define MAX32_MODE_SHIFT 0U
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#define MAX32_MODE_MASK 0x0FU
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#define MAX32_PORT_SHIFT 4U
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#define MAX32_PORT_MASK 0x0FU
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#define MAX32_PIN_SHIFT 8U
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#define MAX32_PIN_MASK 0xFFU
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#define MAX32_PINMUX(port, pin, mode) \
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((((port)&MAX32_PORT_MASK) << MAX32_PORT_SHIFT) | \
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(((pin)&MAX32_PIN_MASK) << MAX32_PIN_SHIFT) | \
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(((MAX32_MODE_##mode) & MAX32_MODE_MASK) << MAX32_MODE_SHIFT))
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#define MAX32_PINMUX_PORT(pinmux) (((pinmux) >> MAX32_PORT_SHIFT) & MAX32_PORT_MASK)
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#define MAX32_PINMUX_PIN(pinmux) (((pinmux) >> MAX32_PIN_SHIFT) & MAX32_PIN_MASK)
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#define MAX32_PINMUX_MODE(pinmux) (((pinmux) >> MAX32_MODE_SHIFT) & MAX32_MODE_MASK)
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/* Selects the voltage rail used for the pin */
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#define MAX32_VSEL_VDDIO 0
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#define MAX32_VSEL_VDDIOH 1
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#define MAX32_INPUT_ENABLE_SHIFT 0x00
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#define MAX32_BIAS_PULL_UP_SHIFT 0x01
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#define MAX32_BIAS_PULL_DOWN_SHIFT 0x02
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#define MAX32_OUTPUT_ENABLE_SHIFT 0x03
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#define MAX32_POWER_SOURCE_SHIFT 0x04
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#define MAX32_OUTPUT_HIGH_SHIFT 0x05
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#define MAX32_DRV_STRENGTH_SHIFT 0x06
/* 2 bits */
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#define MAX32_DRV_STRENGTH_MASK 0x03
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_ */
zephyr
dt-bindings
pinctrl
max32-pinctrl.h
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1.12.0