Zephyr API Documentation
4.0.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
imx_ccm_rev2.h
Go to the documentation of this file.
1
/*
2
* Copyright 2021,2024 NXP
3
*
4
* SPDX-License-Identifier: Apache-2.0
5
*/
6
7
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_REV2_H_
8
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_REV2_H_
9
10
/* Peripheral:
11
* range: 0 - 0xFF, starting from 0
12
*
13
* Instance:
14
* range: 0 - 0xFF, starting from 0
15
*/
16
#define IMX_CCM_PERIPHERAL_MASK 0xFF00UL
17
#define IMX_CCM_INSTANCE_MASK 0xFFUL
18
19
#define IMX_CCM_CORESYS_CLK 0
20
#define IMX_CCM_PLATFORM_CLK 0x1UL
21
#define IMX_CCM_BUS_CLK 0x2UL
22
23
/* LPUART */
24
#define IMX_CCM_LPUART_CLK 0x300UL
25
#define IMX_CCM_LPUART1_CLK 0x300UL
26
#define IMX_CCM_LPUART0102_CLK 0x300UL
27
#define IMX_CCM_LPUART2_CLK 0x301UL
28
#define IMX_CCM_LPUART0304_CLK 0x301UL
29
#define IMX_CCM_LPUART3_CLK 0x302UL
30
#define IMX_CCM_LPUART0506_CLK 0x302UL
31
#define IMX_CCM_LPUART4_CLK 0x303UL
32
#define IMX_CCM_LPUART0708_CLK 0x303UL
33
#define IMX_CCM_LPUART5_CLK 0x304UL
34
#define IMX_CCM_LPUART0910_CLK 0x304UL
35
#define IMX_CCM_LPUART6_CLK 0x305UL
36
#define IMX_CCM_LPUART1112_CLK 0x305UL
37
#define IMX_CCM_LPUART7_CLK 0x306UL
38
#define IMX_CCM_LPUART8_CLK 0x307UL
39
#define IMX_CCM_LPUART9_CLK 0x308UL
40
#define IMX_CCM_LPUART10_CLK 0x309UL
41
#define IMX_CCM_LPUART11_CLK 0x30aUL
42
#define IMX_CCM_LPUART12_CLK 0x30bUL
43
44
/* LPI2C */
45
#define IMX_CCM_LPI2C_CLK 0x400UL
46
#define IMX_CCM_LPI2C0102_CLK 0x400UL
47
#define IMX_CCM_LPI2C1_CLK 0x400UL
48
#define IMX_CCM_LPI2C2_CLK 0x401UL
49
#define IMX_CCM_LPI2C0304_CLK 0x401UL
50
#define IMX_CCM_LPI2C3_CLK 0x402UL
51
#define IMX_CCM_LPI2C4_CLK 0x403UL
52
#define IMX_CCM_LPI2C0506_CLK 0x402UL
53
#define IMX_CCM_LPI2C5_CLK 0x404UL
54
#define IMX_CCM_LPI2C6_CLK 0x405UL
55
#define IMX_CCM_LPI2C0708_CLK 0x403UL
56
#define IMX_CCM_LPI2C7_CLK 0x406UL
57
#define IMX_CCM_LPI2C8_CLK 0x407UL
58
59
/* LPSPI */
60
#define IMX_CCM_LPSPI_CLK 0x500UL
61
#define IMX_CCM_LPSPI1_CLK 0x500UL
62
#define IMX_CCM_LPSPI2_CLK 0x501UL
63
#define IMX_CCM_LPSPI3_CLK 0x502UL
64
#define IMX_CCM_LPSPI4_CLK 0x503UL
65
#define IMX_CCM_LPSPI5_CLK 0x504UL
66
#define IMX_CCM_LPSPI6_CLK 0x505UL
67
#define IMX_CCM_LPSPI7_CLK 0x506UL
68
#define IMX_CCM_LPSPI8_CLK 0x507UL
69
70
/* USDHC */
71
#define IMX_CCM_USDHC1_CLK 0x600UL
72
#define IMX_CCM_USDHC2_CLK 0x601UL
73
74
/* DMA */
75
#define IMX_CCM_EDMA_CLK 0x700UL
76
#define IMX_CCM_EDMA_LPSR_CLK 0x701UL
77
78
/* PWM */
79
#define IMX_CCM_PWM_CLK 0x800UL
80
81
/* CAN */
82
#define IMX_CCM_CAN_CLK 0x900UL
83
#define IMX_CCM_CAN1_CLK 0x900UL
84
#define IMX_CCM_CAN2_CLK 0x901UL
85
#define IMX_CCM_CAN3_CLK 0x902UL
86
87
/* GPT */
88
#define IMX_CCM_GPT_CLK 0x1000UL
89
#define IMX_CCM_GPT1_CLK 0x1000UL
90
#define IMX_CCM_GPT2_CLK 0x1001UL
91
#define IMX_CCM_GPT3_CLK 0x1002UL
92
#define IMX_CCM_GPT4_CLK 0x1003UL
93
#define IMX_CCM_GPT5_CLK 0x1004UL
94
#define IMX_CCM_GPT6_CLK 0x1005UL
95
96
/* SAI */
97
#define IMX_CCM_SAI1_CLK 0x1100UL
98
#define IMX_CCM_SAI2_CLK 0x1101UL
99
#define IMX_CCM_SAI3_CLK 0x1102UL
100
#define IMX_CCM_SAI4_CLK 0x1103UL
101
102
/* ENET */
103
#define IMX_CCM_ENET_CLK 0x1200UL
104
#define IMX_CCM_ENET_PLL 0x1201UL
105
#define IMX_CCM_ENET1G_CLK 0x1202UL
106
#define IMX_CCM_ENET1G_PLL 0x1203UL
107
108
/* FLEXSPI */
109
#define IMX_CCM_FLEXSPI_CLK 0x1300UL
110
#define IMX_CCM_FLEXSPI2_CLK 0x1301UL
111
112
/* PIT */
113
#define IMX_CCM_PIT_CLK 0x1400UL
114
#define IMX_CCM_PIT1_CLK 0x1401UL
115
116
/* ADC */
117
#define IMX_CCM_LPADC1_CLK 0x1500UL
118
#define IMX_CCM_LPADC2_CLK 0x1501UL
119
120
/* TPM */
121
#define IMX_CCM_TPM_CLK 0x1600UL
122
#define IMX_CCM_TPM1_CLK 0x1600UL
123
#define IMX_CCM_TPM2_CLK 0x1601UL
124
#define IMX_CCM_TPM3_CLK 0x1602UL
125
#define IMX_CCM_TPM4_CLK 0x1603UL
126
#define IMX_CCM_TPM5_CLK 0x1604UL
127
#define IMX_CCM_TPM6_CLK 0x1605UL
128
129
/* FLEXIO */
130
#define IMX_CCM_FLEXIO_CLK 0x1700UL
131
#define IMX_CCM_FLEXIO1_CLK 0x1700UL
132
#define IMX_CCM_FLEXIO2_CLK 0x1701UL
133
134
/* NETC */
135
#define IMX_CCM_NETC_CLK 0x1800UL
136
137
/* MIPI CSI2RX */
138
#define IMX_CCM_MIPI_CSI2RX_ROOT_CLK 0x1900UL
139
#define IMX_CCM_MIPI_CSI2RX_UI_CLK 0x2000UL
140
#define IMX_CCM_MIPI_CSI2RX_ESC_CLK 0x2100UL
141
142
/* QTMR */
143
#define IMX_CCM_QTMR_CLK 0x6000UL
144
#define IMX_CCM_QTMR1_CLK 0x6000UL
145
#define IMX_CCM_QTMR2_CLK 0x6001UL
146
#define IMX_CCM_QTMR3_CLK 0x6002UL
147
#define IMX_CCM_QTMR4_CLK 0x6003UL
148
149
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_REV2_H_ */
zephyr
dt-bindings
clock
imx_ccm_rev2.h
Generated on Sun Nov 24 2024 06:03:15 for Zephyr API Documentation by
1.12.0
1.12.0