Zephyr API Documentation
4.0.0-rc2
A Scalable Open Source RTOS
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gd32e10x-clocks.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2022 Teslabs Engineering S.L.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_GD32E10X_CLOCKS_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_GD32E10X_CLOCKS_H_
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#include "
gd32-clocks-common.h
"
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#define GD32_AHBEN_OFFSET 0x14U
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#define GD32_APB1EN_OFFSET 0x1CU
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#define GD32_APB2EN_OFFSET 0x18U
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#define GD32_ADDAPB1EN_OFFSET 0xE4U
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/* AHB peripherals */
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#define GD32_CLOCK_DMA0 GD32_CLOCK_CONFIG(AHBEN, 0U)
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#define GD32_CLOCK_DMA1 GD32_CLOCK_CONFIG(AHBEN, 1U)
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#define GD32_CLOCK_SRAMSP GD32_CLOCK_CONFIG(AHBEN, 2U)
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#define GD32_CLOCK_FMCSP GD32_CLOCK_CONFIG(AHBEN, 4U)
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#define GD32_CLOCK_CRC GD32_CLOCK_CONFIG(AHBEN, 6U)
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#define GD32_CLOCK_EXMC GD32_CLOCK_CONFIG(AHBEN, 8U)
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#define GD32_CLOCK_USBFS GD32_CLOCK_CONFIG(AHBEN, 12U)
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/* APB1 peripherals */
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#define GD32_CLOCK_TIMER1 GD32_CLOCK_CONFIG(APB1EN, 0U)
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#define GD32_CLOCK_TIMER2 GD32_CLOCK_CONFIG(APB1EN, 1U)
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#define GD32_CLOCK_TIMER3 GD32_CLOCK_CONFIG(APB1EN, 2U)
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#define GD32_CLOCK_TIMER4 GD32_CLOCK_CONFIG(APB1EN, 3U)
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#define GD32_CLOCK_TIMER5 GD32_CLOCK_CONFIG(APB1EN, 4U)
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#define GD32_CLOCK_TIMER6 GD32_CLOCK_CONFIG(APB1EN, 5U)
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#define GD32_CLOCK_TIMER11 GD32_CLOCK_CONFIG(APB1EN, 6U)
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#define GD32_CLOCK_TIMER12 GD32_CLOCK_CONFIG(APB1EN, 7U)
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#define GD32_CLOCK_TIMER13 GD32_CLOCK_CONFIG(APB1EN, 8U)
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#define GD32_CLOCK_WWDGT GD32_CLOCK_CONFIG(APB1EN, 11U)
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#define GD32_CLOCK_SPI1 GD32_CLOCK_CONFIG(APB1EN, 14U)
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#define GD32_CLOCK_SPI2 GD32_CLOCK_CONFIG(APB1EN, 15U)
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#define GD32_CLOCK_USART1 GD32_CLOCK_CONFIG(APB1EN, 17U)
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#define GD32_CLOCK_USART2 GD32_CLOCK_CONFIG(APB1EN, 18U)
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#define GD32_CLOCK_UART3 GD32_CLOCK_CONFIG(APB1EN, 19U)
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#define GD32_CLOCK_UART4 GD32_CLOCK_CONFIG(APB1EN, 20U)
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#define GD32_CLOCK_I2C0 GD32_CLOCK_CONFIG(APB1EN, 21U)
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#define GD32_CLOCK_I2C1 GD32_CLOCK_CONFIG(APB1EN, 22U)
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#define GD32_CLOCK_BKPI GD32_CLOCK_CONFIG(APB1EN, 27U)
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#define GD32_CLOCK_PMU GD32_CLOCK_CONFIG(APB1EN, 28U)
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#define GD32_CLOCK_DAC GD32_CLOCK_CONFIG(APB1EN, 29U)
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/* APB2 peripherals */
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#define GD32_CLOCK_AFIO GD32_CLOCK_CONFIG(APB2EN, 0U)
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#define GD32_CLOCK_GPIOA GD32_CLOCK_CONFIG(APB2EN, 2U)
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#define GD32_CLOCK_GPIOB GD32_CLOCK_CONFIG(APB2EN, 3U)
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#define GD32_CLOCK_GPIOC GD32_CLOCK_CONFIG(APB2EN, 4U)
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#define GD32_CLOCK_GPIOD GD32_CLOCK_CONFIG(APB2EN, 5U)
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#define GD32_CLOCK_GPIOE GD32_CLOCK_CONFIG(APB2EN, 6U)
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#define GD32_CLOCK_ADC0 GD32_CLOCK_CONFIG(APB2EN, 9U)
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#define GD32_CLOCK_ADC1 GD32_CLOCK_CONFIG(APB2EN, 10U)
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#define GD32_CLOCK_TIMER0 GD32_CLOCK_CONFIG(APB2EN, 11U)
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#define GD32_CLOCK_SPI0 GD32_CLOCK_CONFIG(APB2EN, 12U)
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#define GD32_CLOCK_TIMER7 GD32_CLOCK_CONFIG(APB2EN, 13U)
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#define GD32_CLOCK_USART0 GD32_CLOCK_CONFIG(APB2EN, 14U)
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#define GD32_CLOCK_TIMER8 GD32_CLOCK_CONFIG(APB2EN, 19U)
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#define GD32_CLOCK_TIMER9 GD32_CLOCK_CONFIG(APB2EN, 20U)
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#define GD32_CLOCK_TIMER10 GD32_CLOCK_CONFIG(APB2EN, 21U)
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/* APB1 additional peripherals */
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#define GD32_CLOCK_CTC GD32_CLOCK_CONFIG(ADDAPB1EN, 27U)
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_GD32E10X_CLOCKS_H_ */
gd32-clocks-common.h
zephyr
dt-bindings
clock
gd32e10x-clocks.h
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