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A Scalable Open Source RTOS
4.2.0-rc3
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esp32s3_clock.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_
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/* Supported CPU clock Sources */
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#define ESP32_CPU_CLK_SRC_XTAL 0U
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#define ESP32_CPU_CLK_SRC_PLL 1U
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#define ESP32_CLK_SRC_RC_FAST 2U
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/* Supported PLL CPU frequencies */
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#define ESP32_CLK_CPU_PLL_80M 80000000
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#define ESP32_CLK_CPU_PLL_160M 160000000
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#define ESP32_CLK_CPU_PLL_240M 240000000
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#define ESP32_CLK_CPU_RC_FAST_FREQ 17500000
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/* Supported XTAL frequencies */
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#define ESP32_CLK_XTAL_32M 32000000
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#define ESP32_CLK_XTAL_40M 40000000
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/* Supported RTC fast clock sources */
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#define ESP32_RTC_FAST_CLK_SRC_XTAL_D2 0
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#define ESP32_RTC_FAST_CLK_SRC_RC_FAST 1
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/* Supported RTC slow clock sources */
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#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW 0
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#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K 1
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#define ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256 2
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#define ESP32_RTC_SLOW_CLK_32K_EXT_OSC 9
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/* RTC slow clock frequencies */
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#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ 136000
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#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ 32768
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#define ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256_FREQ 68359
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/* Modules IDs
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* These IDs are actually offsets in CLK and RST Control registers.
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* These IDs shouldn't be changed unless there is a Hardware change
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* from Espressif.
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*
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* Basic Modules
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* Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG
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*/
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#define ESP32_LEDC_MODULE 0
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#define ESP32_UART0_MODULE 1
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#define ESP32_UART1_MODULE 2
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#define ESP32_UART2_MODULE 3
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#define ESP32_USB_MODULE 4
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#define ESP32_I2C0_MODULE 5
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#define ESP32_I2C1_MODULE 6
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#define ESP32_I2S0_MODULE 7
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#define ESP32_I2S1_MODULE 8
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#define ESP32_LCD_CAM_MODULE 9
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#define ESP32_TIMG0_MODULE 10
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#define ESP32_TIMG1_MODULE 11
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#define ESP32_PWM0_MODULE 12
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#define ESP32_PWM1_MODULE 13
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#define ESP32_PWM2_MODULE 14
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#define ESP32_PWM3_MODULE 15
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#define ESP32_UHCI0_MODULE 16
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#define ESP32_UHCI1_MODULE 17
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#define ESP32_RMT_MODULE 18
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#define ESP32_PCNT_MODULE 19
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#define ESP32_SPI_MODULE 20
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#define ESP32_SPI2_MODULE 21
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#define ESP32_SPI3_MODULE 22
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#define ESP32_SDMMC_MODULE 23
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#define ESP32_TWAI_MODULE 24
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#define ESP32_RNG_MODULE 25
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#define ESP32_WIFI_MODULE 26
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#define ESP32_BT_MODULE 27
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#define ESP32_WIFI_BT_COMMON_MODULE 28
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#define ESP32_BT_BASEBAND_MODULE 29
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#define ESP32_BT_LC_MODULE 30
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#define ESP32_AES_MODULE 31
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#define ESP32_SHA_MODULE 32
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#define ESP32_HMAC_MODULE 33
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#define ESP32_DS_MODULE 34
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#define ESP32_RSA_MODULE 35
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#define ESP32_SYSTIMER_MODULE 36
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#define ESP32_GDMA_MODULE 37
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#define ESP32_DEDIC_GPIO_MODULE 38
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#define ESP32_SARADC_MODULE 39
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#define ESP32_MODULE_MAX 40
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ */
zephyr
dt-bindings
clock
esp32s3_clock.h
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