Zephyr API Documentation
4.0.0-rc2
A Scalable Open Source RTOS
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devicetree.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2024, Ambiq Micro Inc. <www.ambiq.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_MSPI_DEVICETREE_H_
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#define ZEPHYR_INCLUDE_DRIVERS_MSPI_DEVICETREE_H_
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#include <
zephyr/drivers/gpio.h
>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define MSPI_DEVICE_CONFIG_DT(mspi_dev) \
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{ \
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.ce_num = DT_PROP_OR(mspi_dev, mspi_hardware_ce_num, 0), \
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.freq = DT_PROP(mspi_dev, mspi_max_frequency), \
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.io_mode = DT_ENUM_IDX_OR(mspi_dev, mspi_io_mode, \
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MSPI_IO_MODE_SINGLE), \
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.data_rate = DT_ENUM_IDX_OR(mspi_dev, mspi_data_rate, \
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MSPI_DATA_RATE_SINGLE), \
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.cpp = DT_ENUM_IDX_OR(mspi_dev, mspi_cpp_mode, MSPI_CPP_MODE_0), \
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.endian = DT_ENUM_IDX_OR(mspi_dev, mspi_endian, \
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MSPI_XFER_LITTLE_ENDIAN), \
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.ce_polarity = DT_ENUM_IDX_OR(mspi_dev, mspi_ce_polarity, \
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MSPI_CE_ACTIVE_LOW), \
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.dqs_enable = DT_PROP(mspi_dev, mspi_dqs_enable), \
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.rx_dummy = DT_PROP_OR(mspi_dev, rx_dummy, 0), \
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.tx_dummy = DT_PROP_OR(mspi_dev, tx_dummy, 0), \
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.read_cmd = DT_PROP_OR(mspi_dev, read_command, 0), \
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.write_cmd = DT_PROP_OR(mspi_dev, write_command, 0), \
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.cmd_length = DT_ENUM_IDX_OR(mspi_dev, command_length, 0), \
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.addr_length = DT_ENUM_IDX_OR(mspi_dev, address_length, 0), \
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.mem_boundary = COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, ce_break_config), \
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(DT_PROP_BY_IDX(mspi_dev, ce_break_config, 0)), \
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(0)), \
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.time_to_break = COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, ce_break_config), \
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(DT_PROP_BY_IDX(mspi_dev, ce_break_config, 1)), \
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(0)), \
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}
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#define MSPI_DEVICE_CONFIG_DT_INST(inst) MSPI_DEVICE_CONFIG_DT(DT_DRV_INST(inst))
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#define MSPI_XIP_CONFIG_DT_NO_CHECK(mspi_dev) \
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{ \
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.enable = DT_PROP_BY_IDX(mspi_dev, xip_config, 0), \
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.address_offset = DT_PROP_BY_IDX(mspi_dev, xip_config, 1), \
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.size = DT_PROP_BY_IDX(mspi_dev, xip_config, 2), \
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.permission = DT_PROP_BY_IDX(mspi_dev, xip_config, 3), \
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}
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#define MSPI_XIP_CONFIG_DT(mspi_dev) \
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COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, xip_config), \
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(MSPI_XIP_CONFIG_DT_NO_CHECK(mspi_dev)), \
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({}))
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#define MSPI_XIP_CONFIG_DT_INST(inst) MSPI_XIP_CONFIG_DT(DT_DRV_INST(inst))
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#define MSPI_SCRAMBLE_CONFIG_DT_NO_CHECK(mspi_dev) \
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{ \
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.enable = DT_PROP_BY_IDX(mspi_dev, scramble_config, 0), \
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.address_offset = DT_PROP_BY_IDX(mspi_dev, scramble_config, 1), \
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.size = DT_PROP_BY_IDX(mspi_dev, scramble_config, 2), \
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}
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#define MSPI_SCRAMBLE_CONFIG_DT(mspi_dev) \
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COND_CODE_1(DT_NODE_HAS_PROP(mspi_dev, scramble_config), \
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(MSPI_SCRAMBLE_CONFIG_DT_NO_CHECK(mspi_dev)), \
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({}))
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#define MSPI_SCRAMBLE_CONFIG_DT_INST(inst) MSPI_SCRAMBLE_CONFIG_DT(DT_DRV_INST(inst))
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#define MSPI_DEVICE_ID_DT(mspi_dev) \
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{ \
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.ce = MSPI_DEV_CE_GPIOS_DT_SPEC_GET(mspi_dev), \
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.dev_idx = DT_REG_ADDR(mspi_dev), \
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}
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#define MSPI_DEVICE_ID_DT_INST(inst) MSPI_DEVICE_ID_DT(DT_DRV_INST(inst))
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#define MSPI_DEV_CE_GPIOS_DT_SPEC_GET(mspi_dev) \
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GPIO_DT_SPEC_GET_BY_IDX_OR(DT_BUS(mspi_dev), ce_gpios, \
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DT_REG_ADDR_RAW(mspi_dev), {})
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#define MSPI_DEV_CE_GPIOS_DT_SPEC_INST_GET(inst) \
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MSPI_DEV_CE_GPIOS_DT_SPEC_GET(DT_DRV_INST(inst))
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#define MSPI_CE_GPIOS_DT_SPEC_GET(node_id) \
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{ \
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COND_CODE_1(DT_NODE_HAS_PROP(node_id, ce_gpios), \
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(DT_FOREACH_PROP_ELEM_SEP(node_id, ce_gpios, GPIO_DT_SPEC_GET_BY_IDX, (,))), \
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()) \
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}
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#define MSPI_CE_GPIOS_DT_SPEC_INST_GET(inst) \
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MSPI_CE_GPIOS_DT_SPEC_GET(DT_DRV_INST(inst))
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#define MSPI_CE_CONTROL_INIT(node_id, delay_) \
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{ \
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.gpio = MSPI_DEV_CE_GPIOS_DT_SPEC_GET(node_id), .delay = (delay_), \
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}
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#define MSPI_CE_CONTROL_INIT_INST(inst, delay_) MSPI_CE_CONTROL_INIT(DT_DRV_INST(inst), delay_)
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#ifdef __cplusplus
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}
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#endif
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#endif
/* ZEPHYR_INCLUDE_DRIVERS_MSPI_DEVICETREE_H_ */
gpio.h
Public APIs for GPIO drivers.
zephyr
drivers
mspi
devicetree.h
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