Zephyr API Documentation 4.2.99
A Scalable Open Source RTOS
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gpio.h
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1/*
2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Piotr Mienkowski
4 * Copyright (c) 2017 ARM Ltd
5 * Copyright (c) 2015-2016 Intel Corporation.
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
15
16#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
17#define ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
18
19#include <errno.h>
20
21#include <zephyr/sys/__assert.h>
22#include <zephyr/sys/slist.h>
24
25#include <zephyr/types.h>
26#include <stddef.h>
27#include <zephyr/device.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
47
52
54#define GPIO_INPUT BIT(16)
55
57#define GPIO_OUTPUT BIT(17)
58
60#define GPIO_DISCONNECTED 0
61
63
64/* Initializes output to a low state. */
65#define GPIO_OUTPUT_INIT_LOW BIT(18)
66
67/* Initializes output to a high state. */
68#define GPIO_OUTPUT_INIT_HIGH BIT(19)
69
70/* Initializes output based on logic level */
71#define GPIO_OUTPUT_INIT_LOGICAL BIT(20)
72
74
76#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW)
78#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH)
80#define GPIO_OUTPUT_INACTIVE (GPIO_OUTPUT | \
81 GPIO_OUTPUT_INIT_LOW | \
82 GPIO_OUTPUT_INIT_LOGICAL)
83
84#define GPIO_OUTPUT_ACTIVE (GPIO_OUTPUT | \
85 GPIO_OUTPUT_INIT_HIGH | \
86 GPIO_OUTPUT_INIT_LOGICAL)
87
89
105
107#define GPIO_INT_DISABLE BIT(21)
108
110
111/* Enables GPIO pin interrupt. */
112#define GPIO_INT_ENABLE BIT(22)
113
114/* GPIO interrupt is sensitive to logical levels.
115 *
116 * This is a component flag that should be combined with other
117 * `GPIO_INT_*` flags to produce a meaningful configuration.
118 */
119#define GPIO_INT_LEVELS_LOGICAL BIT(23)
120
121/* GPIO interrupt is edge sensitive.
122 *
123 * Note: by default interrupts are level sensitive.
124 *
125 * This is a component flag that should be combined with other
126 * `GPIO_INT_*` flags to produce a meaningful configuration.
127 */
128#define GPIO_INT_EDGE BIT(24)
129
130/* Trigger detection when input state is (or transitions to) physical low or
131 * logical 0 level.
132 *
133 * This is a component flag that should be combined with other
134 * `GPIO_INT_*` flags to produce a meaningful configuration.
135 */
136#define GPIO_INT_LOW_0 BIT(25)
137
138/* Trigger detection on input state is (or transitions to) physical high or
139 * logical 1 level.
140 *
141 * This is a component flag that should be combined with other
142 * `GPIO_INT_*` flags to produce a meaningful configuration.
143 */
144#define GPIO_INT_HIGH_1 BIT(26)
145
146#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
147/* Disable/Enable interrupt functionality without changing other interrupt
148 * related register, such as clearing the pending register.
149 *
150 * This is a component flag that should be combined with `GPIO_INT_ENABLE` or
151 * `GPIO_INT_DISABLE` flags to produce a meaningful configuration.
152 */
153#define GPIO_INT_ENABLE_DISABLE_ONLY BIT(27)
154#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
155
156#define GPIO_INT_MASK (GPIO_INT_DISABLE | \
157 GPIO_INT_ENABLE | \
158 GPIO_INT_LEVELS_LOGICAL | \
159 GPIO_INT_EDGE | \
160 GPIO_INT_LOW_0 | \
161 GPIO_INT_HIGH_1)
162
164
167#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \
168 GPIO_INT_EDGE | \
169 GPIO_INT_HIGH_1)
170
174#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \
175 GPIO_INT_EDGE | \
176 GPIO_INT_LOW_0)
177
181#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \
182 GPIO_INT_EDGE | \
183 GPIO_INT_LOW_0 | \
184 GPIO_INT_HIGH_1)
185
189#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \
190 GPIO_INT_LOW_0)
191
195#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \
196 GPIO_INT_HIGH_1)
197
201#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \
202 GPIO_INT_LEVELS_LOGICAL | \
203 GPIO_INT_EDGE | \
204 GPIO_INT_LOW_0)
205
209#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \
210 GPIO_INT_LEVELS_LOGICAL | \
211 GPIO_INT_EDGE | \
212 GPIO_INT_HIGH_1)
213
217#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \
218 GPIO_INT_LEVELS_LOGICAL | \
219 GPIO_INT_LOW_0)
220
224#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \
225 GPIO_INT_LEVELS_LOGICAL | \
226 GPIO_INT_HIGH_1)
227
229
231#define GPIO_DIR_MASK (GPIO_INPUT | GPIO_OUTPUT)
233
241
254
262
274
282
303
338#define GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
339 { \
340 .port = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)),\
341 .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
342 .dt_flags = DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
343 }
344
362#define GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, idx, default_value) \
363 COND_CODE_1(DT_PROP_HAS_IDX(node_id, prop, idx), \
364 (GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx)), \
365 (default_value))
366
375#define GPIO_DT_SPEC_GET(node_id, prop) \
376 GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, 0)
377
388#define GPIO_DT_SPEC_GET_OR(node_id, prop, default_value) \
389 GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, 0, default_value)
390
401#define GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, idx) \
402 GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)
403
415#define GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, idx, default_value) \
416 COND_CODE_1(DT_PROP_HAS_IDX(DT_DRV_INST(inst), prop, idx), \
417 (GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)), \
418 (default_value))
419
428#define GPIO_DT_SPEC_INST_GET(inst, prop) \
429 GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, 0)
430
441#define GPIO_DT_SPEC_INST_GET_OR(inst, prop, default_value) \
442 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, 0, default_value)
443
444/*
445 * @cond INTERNAL_HIDDEN
446 */
447
458#define Z_GPIO_GEN_BITMASK_COND(node_id, prop, off_idx, sz_idx) \
459 COND_CODE_1(DT_PROP_HAS_IDX(node_id, prop, off_idx), \
460 (COND_CODE_0(DT_PROP_BY_IDX(node_id, prop, sz_idx), \
461 (0), \
462 (GENMASK64(DT_PROP_BY_IDX(node_id, prop, off_idx) + \
463 DT_PROP_BY_IDX(node_id, prop, sz_idx) - 1, \
464 DT_PROP_BY_IDX(node_id, prop, off_idx)))) \
465 ), (0))
466
474#define Z_GPIO_GEN_RESERVED_RANGES_COND(odd_it, node_id) \
475 COND_CODE_1(DT_PROP_HAS_IDX(node_id, gpio_reserved_ranges, odd_it), \
476 (Z_GPIO_GEN_BITMASK_COND(node_id, \
477 gpio_reserved_ranges, \
478 GET_ARG_N(odd_it, Z_SPARSE_LIST_EVEN_NUMBERS), \
479 odd_it)), \
480 (0))
481
485
573#define GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, ngpios) \
574 ((gpio_port_pins_t) \
575 COND_CODE_1(DT_NODE_HAS_PROP(node_id, gpio_reserved_ranges), \
576 (GENMASK64(BITS_PER_LONG_LONG - 1, ngpios) \
577 | FOR_EACH_FIXED_ARG(Z_GPIO_GEN_RESERVED_RANGES_COND, \
578 (|), \
579 node_id, \
580 LIST_DROP_EMPTY(Z_SPARSE_LIST_ODD_NUMBERS))), \
581 (0)))
582
590#define GPIO_DT_RESERVED_RANGES(node_id) \
591 GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, DT_PROP(node_id, ngpios))
592
602#define GPIO_DT_INST_RESERVED_RANGES_NGPIOS(inst, ngpios) \
603 GPIO_DT_RESERVED_RANGES_NGPIOS(DT_DRV_INST(inst), ngpios)
604
613#define GPIO_DT_INST_RESERVED_RANGES(inst) \
614 GPIO_DT_RESERVED_RANGES(DT_DRV_INST(inst))
615
664#define GPIO_DT_PORT_PIN_MASK_NGPIOS_EXC(node_id, ngpios) \
665 ((gpio_port_pins_t) \
666 COND_CODE_0(ngpios, \
667 (0), \
668 (COND_CODE_1(DT_NODE_HAS_PROP(node_id, gpio_reserved_ranges), \
669 ((GENMASK64(ngpios - 1, 0) & \
670 ~GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, ngpios))), \
671 (GENMASK64(ngpios - 1, 0))) \
672 ) \
673 ))
674
684#define GPIO_DT_INST_PORT_PIN_MASK_NGPIOS_EXC(inst, ngpios) \
685 GPIO_DT_PORT_PIN_MASK_NGPIOS_EXC(DT_DRV_INST(inst), ngpios)
686
690#define GPIO_MAX_PINS_PER_PORT (sizeof(gpio_port_pins_t) * __CHAR_BIT__)
691
705
718
719struct gpio_callback;
720
733typedef void (*gpio_callback_handler_t)(const struct device *port,
734 struct gpio_callback *cb,
735 gpio_port_pins_t pins);
736
764
770
771/* Used by driver api function pin_interrupt_configure, these are defined
772 * in terms of the public flags so we can just mask and pass them
773 * through to the driver api
774 */
775enum gpio_int_mode {
776 GPIO_INT_MODE_DISABLED = GPIO_INT_DISABLE,
777 GPIO_INT_MODE_LEVEL = GPIO_INT_ENABLE,
778 GPIO_INT_MODE_EDGE = GPIO_INT_ENABLE | GPIO_INT_EDGE,
779#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
780 GPIO_INT_MODE_DISABLE_ONLY = GPIO_INT_DISABLE | GPIO_INT_ENABLE_DISABLE_ONLY,
781 GPIO_INT_MODE_ENABLE_ONLY = GPIO_INT_ENABLE | GPIO_INT_ENABLE_DISABLE_ONLY,
782#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
783};
784
785enum gpio_int_trig {
786 /* Trigger detection when input state is (or transitions to)
787 * physical low. (Edge Falling or Active Low)
788 */
789 GPIO_INT_TRIG_LOW = GPIO_INT_LOW_0,
790 /* Trigger detection when input state is (or transitions to)
791 * physical high. (Edge Rising or Active High) */
792 GPIO_INT_TRIG_HIGH = GPIO_INT_HIGH_1,
793 /* Trigger detection on pin rising or falling edge. */
794 GPIO_INT_TRIG_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1,
795 /* Trigger a system wakeup. */
796 GPIO_INT_TRIG_WAKE = GPIO_INT_WAKEUP,
797 /* Trigger a system wakeup when input state is (or transitions to)
798 * physical low. (Edge Falling or Active Low)
799 */
800 GPIO_INT_TRIG_WAKE_LOW = GPIO_INT_LOW_0 | GPIO_INT_WAKEUP,
801 /* Trigger a system wakeup when input state is (or transitions to)
802 * physical high. (Edge Rising or Active High)
803 */
804 GPIO_INT_TRIG_WAKE_HIGH = GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP,
805 /* Trigger a system wakeup on pin rising or falling edge. */
806 GPIO_INT_TRIG_WAKE_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP,
807};
808
809__subsystem struct gpio_driver_api {
810 int (*pin_configure)(const struct device *port, gpio_pin_t pin,
812#ifdef CONFIG_GPIO_GET_CONFIG
813 int (*pin_get_config)(const struct device *port, gpio_pin_t pin,
815#endif
816 int (*port_get_raw)(const struct device *port,
817 gpio_port_value_t *value);
818 int (*port_set_masked_raw)(const struct device *port,
819 gpio_port_pins_t mask,
820 gpio_port_value_t value);
821 int (*port_set_bits_raw)(const struct device *port,
822 gpio_port_pins_t pins);
823 int (*port_clear_bits_raw)(const struct device *port,
824 gpio_port_pins_t pins);
825 int (*port_toggle_bits)(const struct device *port,
826 gpio_port_pins_t pins);
827 int (*pin_interrupt_configure)(const struct device *port,
828 gpio_pin_t pin,
829 enum gpio_int_mode mode,
830 enum gpio_int_trig trig);
831 int (*manage_callback)(const struct device *port,
832 struct gpio_callback *cb,
833 bool set);
834 uint32_t (*get_pending_int)(const struct device *dev);
835#ifdef CONFIG_GPIO_GET_DIRECTION
836 int (*port_get_direction)(const struct device *port, gpio_port_pins_t map,
837 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
838#endif /* CONFIG_GPIO_GET_DIRECTION */
839};
840
844
853static inline bool gpio_is_ready_dt(const struct gpio_dt_spec *spec)
854{
855 /* Validate port is ready */
856 return device_is_ready(spec->port);
857}
858
882__syscall int gpio_pin_interrupt_configure(const struct device *port,
883 gpio_pin_t pin,
885
886static inline int z_impl_gpio_pin_interrupt_configure(const struct device *port,
887 gpio_pin_t pin,
889{
890 const struct gpio_driver_api *api =
891 (const struct gpio_driver_api *)port->api;
892 __unused const struct gpio_driver_config *const cfg =
893 (const struct gpio_driver_config *)port->config;
894 const struct gpio_driver_data *const data =
895 (const struct gpio_driver_data *)port->data;
896 enum gpio_int_trig trig;
897 enum gpio_int_mode mode;
898 int ret;
899
900 SYS_PORT_TRACING_FUNC_ENTER(gpio_pin, interrupt_configure, port, pin, flags);
901
902 if (api->pin_interrupt_configure == NULL) {
903 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, interrupt_configure, port, pin, -ENOSYS);
904 return -ENOSYS;
905 }
906
907 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE))
908 != (GPIO_INT_DISABLE | GPIO_INT_ENABLE),
909 "Cannot both enable and disable interrupts");
910
911 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U,
912 "Must either enable or disable interrupts");
913
914 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
915 ((flags & GPIO_INT_EDGE) != 0) ||
916 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) !=
917 (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)),
918 "Only one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 can be "
919 "enabled for a level interrupt.");
920
921#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
922#define GPIO_INT_ENABLE_DISABLE_ONLY_VALUE GPIO_INT_ENABLE_DISABLE_ONLY
923#else
924#define GPIO_INT_ENABLE_DISABLE_ONLY_VALUE 0
925#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
926
927 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
928 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) != 0) ||
930 "At least one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 has to be enabled.");
931#undef GPIO_INT_ENABLE_DISABLE_ONLY_VALUE
932 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
933 "Unsupported pin");
934
935 if (((flags & GPIO_INT_LEVELS_LOGICAL) != 0) &&
936 ((data->invert & (gpio_port_pins_t)BIT(pin)) != 0)) {
937 /* Invert signal bits */
938 flags ^= (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1);
939 }
940
941 trig = (enum gpio_int_trig)(flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP));
942#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
943 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE |
944 GPIO_INT_ENABLE_DISABLE_ONLY));
945#else
946 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE));
947#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
948
949 ret = api->pin_interrupt_configure(port, pin, mode, trig);
950 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, interrupt_configure, port, pin, ret);
951 return ret;
952}
953
971static inline int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec,
973{
974 return gpio_pin_interrupt_configure(spec->port, spec->pin,
975 flags | (spec->dt_flags & GPIO_INT_WAKEUP));
976}
977
993__syscall int gpio_pin_configure(const struct device *port,
994 gpio_pin_t pin,
996
997static inline int z_impl_gpio_pin_configure(const struct device *port,
998 gpio_pin_t pin,
1000{
1001 const struct gpio_driver_api *api =
1002 (const struct gpio_driver_api *)port->api;
1003 __unused const struct gpio_driver_config *const cfg =
1004 (const struct gpio_driver_config *)port->config;
1005 struct gpio_driver_data *data =
1006 (struct gpio_driver_data *)port->data;
1007 int ret;
1008
1009 SYS_PORT_TRACING_FUNC_ENTER(gpio_pin, configure, port, pin, flags);
1010
1011 __ASSERT((flags & GPIO_INT_MASK) == 0,
1012 "Interrupt flags are not supported");
1013
1014 __ASSERT((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) !=
1016 "Pull Up and Pull Down should not be enabled simultaneously");
1017
1018 __ASSERT(!((flags & GPIO_INPUT) && !(flags & GPIO_OUTPUT) && (flags & GPIO_SINGLE_ENDED)),
1019 "Input cannot be enabled for 'Open Drain', 'Open Source' modes without Output");
1020
1021 __ASSERT_NO_MSG((flags & GPIO_SINGLE_ENDED) != 0 ||
1022 (flags & GPIO_LINE_OPEN_DRAIN) == 0);
1023
1024 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) == 0
1025 || (flags & GPIO_OUTPUT) != 0,
1026 "Output needs to be enabled to be initialized low or high");
1027
1028 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH))
1029 != (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH),
1030 "Output cannot be initialized low and high");
1031
1032 if (((flags & GPIO_OUTPUT_INIT_LOGICAL) != 0)
1033 && ((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) != 0)
1034 && ((flags & GPIO_ACTIVE_LOW) != 0)) {
1035 flags ^= GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH;
1036 }
1037
1038 flags &= ~GPIO_OUTPUT_INIT_LOGICAL;
1039
1040 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1041 "Unsupported pin");
1042
1043 if ((flags & GPIO_ACTIVE_LOW) != 0) {
1044 data->invert |= (gpio_port_pins_t)BIT(pin);
1045 } else {
1046 data->invert &= ~(gpio_port_pins_t)BIT(pin);
1047 }
1048
1049 ret = api->pin_configure(port, pin, flags);
1050 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, configure, port, pin, ret);
1051 return ret;
1052}
1053
1065static inline int gpio_pin_configure_dt(const struct gpio_dt_spec *spec,
1066 gpio_flags_t extra_flags)
1067{
1068 return gpio_pin_configure(spec->port,
1069 spec->pin,
1070 spec->dt_flags | extra_flags);
1071}
1072
1091__syscall int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
1092 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
1093
1094#ifdef CONFIG_GPIO_GET_DIRECTION
1095static inline int z_impl_gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
1096 gpio_port_pins_t *inputs,
1097 gpio_port_pins_t *outputs)
1098{
1099 const struct gpio_driver_api *api = (const struct gpio_driver_api *)port->api;
1100 int ret;
1101
1102 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, get_direction, port, map, inputs, outputs);
1103
1104 if (api->port_get_direction == NULL) {
1105 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, get_direction, port, -ENOSYS);
1106 return -ENOSYS;
1107 }
1108
1109 ret = api->port_get_direction(port, map, inputs, outputs);
1110 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, get_direction, port, ret);
1111 return ret;
1112}
1113#endif /* CONFIG_GPIO_GET_DIRECTION */
1114
1127static inline int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
1128{
1129 int rv;
1130 gpio_port_pins_t pins;
1131 __unused const struct gpio_driver_config *cfg =
1132 (const struct gpio_driver_config *)port->config;
1133
1134 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U, "Unsupported pin");
1135
1136 rv = gpio_port_get_direction(port, BIT(pin), &pins, NULL);
1137 if (rv < 0) {
1138 return rv;
1139 }
1140
1141 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
1142}
1143
1155static inline int gpio_pin_is_input_dt(const struct gpio_dt_spec *spec)
1156{
1157 return gpio_pin_is_input(spec->port, spec->pin);
1158}
1159
1172static inline int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
1173{
1174 int rv;
1175 gpio_port_pins_t pins;
1176 __unused const struct gpio_driver_config *cfg =
1177 (const struct gpio_driver_config *)port->config;
1178
1179 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U, "Unsupported pin");
1180
1181 rv = gpio_port_get_direction(port, BIT(pin), NULL, &pins);
1182 if (rv < 0) {
1183 return rv;
1184 }
1185
1186 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
1187}
1188
1200static inline int gpio_pin_is_output_dt(const struct gpio_dt_spec *spec)
1201{
1202 return gpio_pin_is_output(spec->port, spec->pin);
1203}
1204
1220__syscall int gpio_pin_get_config(const struct device *port, gpio_pin_t pin,
1222
1223#ifdef CONFIG_GPIO_GET_CONFIG
1224static inline int z_impl_gpio_pin_get_config(const struct device *port,
1225 gpio_pin_t pin,
1227{
1228 const struct gpio_driver_api *api =
1229 (const struct gpio_driver_api *)port->api;
1230 int ret;
1231
1232 SYS_PORT_TRACING_FUNC_ENTER(gpio_pin, get_config, port, pin, *flags);
1233
1234 if (api->pin_get_config == NULL) {
1235 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, get_config, port, pin, -ENOSYS);
1236 return -ENOSYS;
1237 }
1238
1239 ret = api->pin_get_config(port, pin, flags);
1240 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, get_config, port, pin, ret);
1241 return ret;
1242}
1243#endif
1244
1257static inline int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec,
1259{
1260 return gpio_pin_get_config(spec->port, spec->pin, flags);
1261}
1262
1280__syscall int gpio_port_get_raw(const struct device *port,
1281 gpio_port_value_t *value);
1282
1283static inline int z_impl_gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
1284{
1285 const struct gpio_driver_api *api = (const struct gpio_driver_api *)port->api;
1286 int ret;
1287
1288 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, get_raw, port, value);
1289
1290 ret = api->port_get_raw(port, value);
1291 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, get_raw, port, ret);
1292 return ret;
1293}
1294
1313static inline int gpio_port_get(const struct device *port,
1314 gpio_port_value_t *value)
1315{
1316 const struct gpio_driver_data *const data =
1317 (const struct gpio_driver_data *)port->data;
1318 int ret;
1319
1320 ret = gpio_port_get_raw(port, value);
1321 if (ret == 0) {
1322 *value ^= data->invert;
1323 }
1324
1325 return ret;
1326}
1327
1345__syscall int gpio_port_set_masked_raw(const struct device *port,
1346 gpio_port_pins_t mask,
1347 gpio_port_value_t value);
1348
1349static inline int z_impl_gpio_port_set_masked_raw(const struct device *port,
1350 gpio_port_pins_t mask,
1351 gpio_port_value_t value)
1352{
1353 const struct gpio_driver_api *api =
1354 (const struct gpio_driver_api *)port->api;
1355 int ret;
1356
1357 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, set_masked_raw, port, mask, value);
1358
1359 ret = api->port_set_masked_raw(port, mask, value);
1360 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, set_masked_raw, port, ret);
1361 return ret;
1362}
1363
1384static inline int gpio_port_set_masked(const struct device *port,
1385 gpio_port_pins_t mask,
1386 gpio_port_value_t value)
1387{
1388 const struct gpio_driver_data *const data =
1389 (const struct gpio_driver_data *)port->data;
1390
1391 value ^= data->invert;
1392
1393 return gpio_port_set_masked_raw(port, mask, value);
1394}
1395
1406__syscall int gpio_port_set_bits_raw(const struct device *port,
1407 gpio_port_pins_t pins);
1408
1409static inline int z_impl_gpio_port_set_bits_raw(const struct device *port,
1410 gpio_port_pins_t pins)
1411{
1412 const struct gpio_driver_api *api =
1413 (const struct gpio_driver_api *)port->api;
1414 int ret;
1415
1416 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, set_bits_raw, port, pins);
1417
1418 ret = api->port_set_bits_raw(port, pins);
1419 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, set_bits_raw, port, ret);
1420 return ret;
1421}
1422
1433static inline int gpio_port_set_bits(const struct device *port,
1434 gpio_port_pins_t pins)
1435{
1436 return gpio_port_set_masked(port, pins, pins);
1437}
1438
1449__syscall int gpio_port_clear_bits_raw(const struct device *port,
1450 gpio_port_pins_t pins);
1451
1452static inline int z_impl_gpio_port_clear_bits_raw(const struct device *port,
1453 gpio_port_pins_t pins)
1454{
1455 const struct gpio_driver_api *api =
1456 (const struct gpio_driver_api *)port->api;
1457 int ret;
1458
1459 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, clear_bits_raw, port, pins);
1460
1461 ret = api->port_clear_bits_raw(port, pins);
1462 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, clear_bits_raw, port, ret);
1463 return ret;
1464}
1465
1476static inline int gpio_port_clear_bits(const struct device *port,
1477 gpio_port_pins_t pins)
1478{
1479 return gpio_port_set_masked(port, pins, 0);
1480}
1481
1492__syscall int gpio_port_toggle_bits(const struct device *port,
1493 gpio_port_pins_t pins);
1494
1495static inline int z_impl_gpio_port_toggle_bits(const struct device *port,
1496 gpio_port_pins_t pins)
1497{
1498 const struct gpio_driver_api *api =
1499 (const struct gpio_driver_api *)port->api;
1500 int ret;
1501
1502 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, toggle_bits, port, pins);
1503
1504 ret = api->port_toggle_bits(port, pins);
1505 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, toggle_bits, port, ret);
1506 return ret;
1507}
1508
1520static inline int gpio_port_set_clr_bits_raw(const struct device *port,
1521 gpio_port_pins_t set_pins,
1522 gpio_port_pins_t clear_pins)
1523{
1524 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1525
1526 return gpio_port_set_masked_raw(port, set_pins | clear_pins, set_pins);
1527}
1528
1540static inline int gpio_port_set_clr_bits(const struct device *port,
1541 gpio_port_pins_t set_pins,
1542 gpio_port_pins_t clear_pins)
1543{
1544 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1545
1546 return gpio_port_set_masked(port, set_pins | clear_pins, set_pins);
1547}
1548
1564static inline int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
1565{
1566 __unused const struct gpio_driver_config *const cfg =
1567 (const struct gpio_driver_config *)port->config;
1568 gpio_port_value_t value;
1569 int ret;
1570
1571 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1572 "Unsupported pin");
1573
1574 ret = gpio_port_get_raw(port, &value);
1575 if (ret == 0) {
1576 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1577 }
1578
1579 return ret;
1580}
1581
1601static inline int gpio_pin_get(const struct device *port, gpio_pin_t pin)
1602{
1603 __unused const struct gpio_driver_config *const cfg =
1604 (const struct gpio_driver_config *)port->config;
1605 gpio_port_value_t value;
1606 int ret;
1607
1608 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1609 "Unsupported pin");
1610
1611 ret = gpio_port_get(port, &value);
1612 if (ret == 0) {
1613 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1614 }
1615
1616 return ret;
1617}
1618
1629static inline int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
1630{
1631 return gpio_pin_get(spec->port, spec->pin);
1632}
1633
1649static inline int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin,
1650 int value)
1651{
1652 __unused const struct gpio_driver_config *const cfg =
1653 (const struct gpio_driver_config *)port->config;
1654 int ret;
1655
1656 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1657 "Unsupported pin");
1658
1659 if (value != 0) {
1660 ret = gpio_port_set_bits_raw(port, (gpio_port_pins_t)BIT(pin));
1661 } else {
1663 }
1664
1665 return ret;
1666}
1667
1689static inline int gpio_pin_set(const struct device *port, gpio_pin_t pin,
1690 int value)
1691{
1692 __unused const struct gpio_driver_config *const cfg =
1693 (const struct gpio_driver_config *)port->config;
1694 const struct gpio_driver_data *const data =
1695 (const struct gpio_driver_data *)port->data;
1696
1697 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1698 "Unsupported pin");
1699
1700 if (data->invert & (gpio_port_pins_t)BIT(pin)) {
1701 value = (value != 0) ? 0 : 1;
1702 }
1703
1704 return gpio_pin_set_raw(port, pin, value);
1705}
1706
1718static inline int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
1719{
1720 return gpio_pin_set(spec->port, spec->pin, value);
1721}
1722
1733static inline int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
1734{
1735 __unused const struct gpio_driver_config *const cfg =
1736 (const struct gpio_driver_config *)port->config;
1737
1738 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1739 "Unsupported pin");
1740
1741 return gpio_port_toggle_bits(port, (gpio_port_pins_t)BIT(pin));
1742}
1743
1754static inline int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
1755{
1756 return gpio_pin_toggle(spec->port, spec->pin);
1757}
1758
1765static inline void gpio_init_callback(struct gpio_callback *callback,
1767 gpio_port_pins_t pin_mask)
1768{
1769 SYS_PORT_TRACING_FUNC_ENTER(gpio, init_callback, callback, handler, pin_mask);
1770
1771 __ASSERT(callback, "Callback pointer should not be NULL");
1772 __ASSERT(handler, "Callback handler pointer should not be NULL");
1773
1774 callback->handler = handler;
1775 callback->pin_mask = pin_mask;
1776
1777 SYS_PORT_TRACING_FUNC_EXIT(gpio, init_callback, callback);
1778}
1779
1794static inline int gpio_add_callback(const struct device *port,
1795 struct gpio_callback *callback)
1796{
1797 const struct gpio_driver_api *api =
1798 (const struct gpio_driver_api *)port->api;
1799 int ret;
1800
1801 SYS_PORT_TRACING_FUNC_ENTER(gpio, add_callback, port, callback);
1802
1803 if (api->manage_callback == NULL) {
1804 SYS_PORT_TRACING_FUNC_EXIT(gpio, add_callback, port, -ENOSYS);
1805 return -ENOSYS;
1806 }
1807
1808 ret = api->manage_callback(port, callback, true);
1809 SYS_PORT_TRACING_FUNC_EXIT(gpio, add_callback, port, ret);
1810 return ret;
1811}
1812
1824static inline int gpio_add_callback_dt(const struct gpio_dt_spec *spec,
1825 struct gpio_callback *callback)
1826{
1827 return gpio_add_callback(spec->port, callback);
1828}
1829
1848static inline int gpio_remove_callback(const struct device *port,
1849 struct gpio_callback *callback)
1850{
1851 const struct gpio_driver_api *api =
1852 (const struct gpio_driver_api *)port->api;
1853 int ret;
1854
1855 SYS_PORT_TRACING_FUNC_ENTER(gpio, remove_callback, port, callback);
1856
1857 if (api->manage_callback == NULL) {
1858 SYS_PORT_TRACING_FUNC_EXIT(gpio, remove_callback, port, -ENOSYS);
1859 return -ENOSYS;
1860 }
1861
1862 ret = api->manage_callback(port, callback, false);
1863 SYS_PORT_TRACING_FUNC_EXIT(gpio, remove_callback, port, ret);
1864 return ret;
1865}
1866
1878static inline int gpio_remove_callback_dt(const struct gpio_dt_spec *spec,
1879 struct gpio_callback *callback)
1880{
1881 return gpio_remove_callback(spec->port, callback);
1882}
1883
1898__syscall int gpio_get_pending_int(const struct device *dev);
1899
1900static inline int z_impl_gpio_get_pending_int(const struct device *dev)
1901{
1902 const struct gpio_driver_api *api =
1903 (const struct gpio_driver_api *)dev->api;
1904 int ret;
1905
1906 SYS_PORT_TRACING_FUNC_ENTER(gpio, get_pending_int, dev);
1907
1908 if (api->get_pending_int == NULL) {
1909 SYS_PORT_TRACING_FUNC_EXIT(gpio, get_pending_int, dev, -ENOSYS);
1910 return -ENOSYS;
1911 }
1912
1913 ret = api->get_pending_int(dev);
1914 SYS_PORT_TRACING_FUNC_EXIT(gpio, get_pending_int, dev, ret);
1915 return ret;
1916}
1917
1921
1922#ifdef __cplusplus
1923}
1924#endif
1925
1926#include <zephyr/syscalls/gpio.h>
1927
1928#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_H_ */
#define GPIO_INT_ENABLE_DISABLE_ONLY_VALUE
System error numbers.
bool device_is_ready(const struct device *dev)
Verify that a device is ready for use.
static int gpio_add_callback(const struct device *port, struct gpio_callback *callback)
Add an application callback.
Definition gpio.h:1794
#define GPIO_OUTPUT
Enables pin as output, no change to the output state.
Definition gpio.h:57
static int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
Get physical level of an input pin.
Definition gpio.h:1564
int gpio_pin_get_config(const struct device *port, gpio_pin_t pin, gpio_flags_t *flags)
Get a configuration of a single pin.
static int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
Check if pin is configured for input.
Definition gpio.h:1127
static int gpio_pin_get(const struct device *port, gpio_pin_t pin)
Get logical level of an input pin.
Definition gpio.h:1601
int gpio_port_set_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to high.
static int gpio_pin_is_output_dt(const struct gpio_dt_spec *spec)
Check if a single pin from gpio_dt_spec is configured for output.
Definition gpio.h:1200
static int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t flags)
Configure pin interrupts from a gpio_dt_spec.
Definition gpio.h:971
static int gpio_remove_callback_dt(const struct gpio_dt_spec *spec, struct gpio_callback *callback)
Remove an application callback.
Definition gpio.h:1878
static int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
Toggle pin level from a gpio_dt_spec.
Definition gpio.h:1754
uint8_t gpio_pin_t
Provides a type to hold a GPIO pin index.
Definition gpio.h:261
static int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
Check if pin is configured for output.
Definition gpio.h:1172
int gpio_get_pending_int(const struct device *dev)
Function to get pending interrupts.
static int gpio_pin_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t extra_flags)
Configure a single pin from a gpio_dt_spec and some extra flags.
Definition gpio.h:1065
static int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
Set logical level of a output pin from a gpio_dt_spec.
Definition gpio.h:1718
static int gpio_add_callback_dt(const struct gpio_dt_spec *spec, struct gpio_callback *callback)
Add an application callback.
Definition gpio.h:1824
static int gpio_port_set_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to active.
Definition gpio.h:1433
uint32_t gpio_flags_t
Provides a type to hold GPIO configuration flags.
Definition gpio.h:281
#define GPIO_ACTIVE_LOW
GPIO pin is active (has logical value '1') in low state.
Definition gpio.h:24
#define GPIO_INT_WAKEUP
Configures GPIO interrupt to wakeup the system from low power mode.
Definition gpio.h:83
static int gpio_port_set_clr_bits_raw(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set physical level of selected output pins.
Definition gpio.h:1520
static int gpio_port_set_clr_bits(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set logical level of selected output pins.
Definition gpio.h:1540
static void gpio_init_callback(struct gpio_callback *callback, gpio_callback_handler_t handler, gpio_port_pins_t pin_mask)
Helper to initialize a struct gpio_callback properly.
Definition gpio.h:1765
static int gpio_pin_is_input_dt(const struct gpio_dt_spec *spec)
Check if a single pin from gpio_dt_spec is configured for input.
Definition gpio.h:1155
#define GPIO_INPUT
Enables pin as input.
Definition gpio.h:54
uint32_t gpio_port_pins_t
Identifies a set of pins associated with a port.
Definition gpio.h:240
static int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec, gpio_flags_t *flags)
Get a configuration of a single pin from a gpio_dt_spec.
Definition gpio.h:1257
int gpio_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
Toggle level of selected output pins.
#define GPIO_INT_DISABLE
Disables GPIO pin interrupt.
Definition gpio.h:107
int gpio_pin_interrupt_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure pin interrupt.
int gpio_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to low.
int gpio_port_set_masked_raw(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set physical level of output pins in a port.
#define GPIO_PULL_UP
Enables GPIO pin pull-up.
Definition gpio.h:73
static int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
Get logical level of an input pin from a gpio_dt_spec.
Definition gpio.h:1629
static int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
Toggle pin level.
Definition gpio.h:1733
static bool gpio_is_ready_dt(const struct gpio_dt_spec *spec)
Validate that GPIO port is ready.
Definition gpio.h:853
uint32_t gpio_port_value_t
Provides values for a set of pins associated with a port.
Definition gpio.h:253
static int gpio_pin_set(const struct device *port, gpio_pin_t pin, int value)
Set logical level of an output pin.
Definition gpio.h:1689
static int gpio_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to inactive.
Definition gpio.h:1476
static int gpio_remove_callback(const struct device *port, struct gpio_callback *callback)
Remove an application callback.
Definition gpio.h:1848
static int gpio_port_set_masked(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set logical level of output pins in a port.
Definition gpio.h:1384
int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map, gpio_port_pins_t *inputs, gpio_port_pins_t *outputs)
Get direction of select pins in a port.
uint16_t gpio_dt_flags_t
Provides a type to hold GPIO devicetree flags.
Definition gpio.h:273
#define GPIO_PULL_DOWN
Enable GPIO pin pull-down.
Definition gpio.h:76
static int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin, int value)
Set physical level of an output pin.
Definition gpio.h:1649
int gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
Get physical level of all input pins in a port.
static int gpio_port_get(const struct device *port, gpio_port_value_t *value)
Get logical level of all input pins in a port.
Definition gpio.h:1313
int gpio_pin_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure a single pin.
void(* gpio_callback_handler_t)(const struct device *port, struct gpio_callback *cb, gpio_port_pins_t pins)
Define the application callback handler function signature.
Definition gpio.h:733
struct _snode sys_snode_t
Single-linked list node structure.
Definition slist.h:39
#define SYS_PORT_TRACING_FUNC_ENTER(type, func,...)
Tracing macro for the entry into a function that might or might not return a value.
Definition tracing_macros.h:248
#define SYS_PORT_TRACING_FUNC_EXIT(type, func,...)
Tracing macro for when a function ends its execution.
Definition tracing_macros.h:274
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition util_macro.h:44
#define ENOSYS
Function not implemented.
Definition errno.h:82
#define NULL
Definition iar_missing_defs.h:20
flags
Definition parser.h:97
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:510
void * data
Address of the device instance private data.
Definition device.h:520
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:516
const void * config
Address of device instance config information.
Definition device.h:514
GPIO callback structure.
Definition gpio.h:747
sys_snode_t node
This is meant to be used in the driver and the user should not mess with it (see drivers/gpio/gpio_ut...
Definition gpio.h:751
gpio_port_pins_t pin_mask
A mask of pins the callback is interested in, if 0 the callback will never be called.
Definition gpio.h:762
gpio_callback_handler_t handler
Actual callback function being called when relevant.
Definition gpio.h:754
This structure is common to all GPIO drivers and is expected to be the first element in the object po...
Definition gpio.h:697
gpio_port_pins_t port_pin_mask
Mask identifying pins supported by the controller.
Definition gpio.h:703
This structure is common to all GPIO drivers and is expected to be the first element in the driver's ...
Definition gpio.h:710
gpio_port_pins_t invert
Mask identifying pins that are configured as active low.
Definition gpio.h:716
Container for GPIO pin information specified in devicetree.
Definition gpio.h:295
const struct device * port
GPIO device controlling the pin.
Definition gpio.h:297
gpio_pin_t pin
The pin's number on the device.
Definition gpio.h:299
gpio_dt_flags_t dt_flags
The pin's configuration flags as specified in devicetree.
Definition gpio.h:301