13#ifndef ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
14#define ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
#define cache_instr_invd_all
Definition cache.h:229
#define cache_instr_disable
Definition cache.h:203
#define cache_instr_flush_all
Definition cache.h:216
#define cache_data_flush_and_invd_range(addr, size)
Definition cache.h:159
#define cache_instr_invd_range(addr, size)
Definition cache.h:289
#define cache_instr_flush_and_invd_all
Definition cache.h:242
#define cache_instr_enable
Definition cache.h:194
#define cache_instr_flush_range(addr, size)
Definition cache.h:265
#define cache_data_invd_range(addr, size)
Definition cache.h:134
#define cache_instr_flush_and_invd_range(addr, size)
Definition cache.h:313
#define cache_data_flush_range(addr, size)
Definition cache.h:110
size_t cache_instr_line_size_get(void)
Get the i-cache line size.
int cache_data_flush_and_invd_all(void)
Flush and Invalidate the d-cache.
size_t cache_data_line_size_get(void)
Get the d-cache line size.
void cache_data_enable(void)
Enable the d-cache.
void cache_data_disable(void)
Disable the d-cache.
int cache_data_flush_all(void)
Flush the d-cache.
int cache_data_invd_all(void)
Invalidate the d-cache.