Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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clock_control_silabs.h
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1/*
2 * Copyright (c) 2024 Silicon Laboratories Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SILABS_H_
14#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SILABS_H_
15
17
23
24#if defined(CONFIG_SOC_SILABS_XG21)
26#elif defined(CONFIG_SOC_SILABS_XG22)
28#elif defined(CONFIG_SOC_SILABS_XG23)
30#elif defined(CONFIG_SOC_SILABS_XG24)
32#elif defined(CONFIG_SOC_SILABS_XG26)
34#elif defined(CONFIG_SOC_SILABS_XG27)
36#elif defined(CONFIG_SOC_SILABS_XG28)
38#elif defined(CONFIG_SOC_SILABS_XG29)
40#endif
41
47
53#define SILABS_DT_CLOCK_CFG(node_id) \
54 { \
55 .bus_clock = DT_CLOCKS_CELL(node_id, enable), \
56 .branch = DT_CLOCKS_CELL(node_id, branch), \
57 }
58
64#define SILABS_DT_INST_CLOCK_CFG(inst) \
65 { \
66 .bus_clock = DT_INST_CLOCKS_CELL(inst, enable), \
67 .branch = DT_INST_CLOCKS_CELL(inst, branch), \
68 }
69
77#define SILABS_DT_CLOCK_CFG_BY_NAME(node_id, name) \
78 { \
79 .bus_clock = DT_CLOCKS_CELL_BY_NAME(node_id, name, enable), \
80 .branch = DT_CLOCKS_CELL_BY_NAME(node_id, name, branch), \
81 }
82
83
91#define SILABS_DT_INST_CLOCK_CFG_BY_NAME(inst, name) \
92 { \
93 .bus_clock = DT_INST_CLOCKS_CELL_BY_NAME(inst, name, enable), \
94 .branch = DT_INST_CLOCKS_CELL_BY_NAME(inst, name, branch), \
95 }
96
98
99#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SILABS_H_ */
Main header file for clock control driver API.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
Clock Management Unit (CMU) clock configuration for a peripheral.
Definition clock_control_silabs.h:43
uint32_t bus_clock
Bus clock enable identifier.
Definition clock_control_silabs.h:44
uint8_t branch
Clock branch the peripheral is sourced from.
Definition clock_control_silabs.h:45