17#ifndef ZEPHYR_INCLUDE_DRIVER_CLOCK_CONTROL_NUMICRO_H_
18#define ZEPHYR_INCLUDE_DRIVER_CLOCK_CONTROL_NUMICRO_H_
23#define NUMICRO_SCC_SUBSYS_ID_PCC 1
48#define DT_NUMICRO_CLOCK_PCC_SUBSYSTEM(dev) \
50 .subsys_id = NUMICRO_SCC_SUBSYS_ID_PCC, \
53 .clk_mod = DT_CLOCKS_CELL(dev, clock_module_index), \
54 .clk_src = DT_CLOCKS_CELL(dev, clock_source), \
55 .clk_div = DT_CLOCKS_CELL(dev, clock_divider), \
60#define DT_NUMICRO_CLOCK_PCC_SUBSYSTEM_INST(inst) DT_NUMICRO_CLOCK_PCC_SUBSYSTEM(DT_DRV_INST(inst))
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
Peripheral clock control configuration structure.
Definition clock_control_numicro.h:26
uint32_t clk_src
Clock source.
Definition clock_control_numicro.h:30
uint32_t clk_div
Clock divider.
Definition clock_control_numicro.h:32
uint32_t clk_mod
Clock module.
Definition clock_control_numicro.h:28
Numicro peripheral clock subsystem configuration.
Definition clock_control_numicro.h:36
struct numicro_scc_subsys_pcc pcc
Peripheral subsystem config.
Definition clock_control_numicro.h:43
uint32_t subsys_id
Subsystem ID (currently hardcoded to PCC).
Definition clock_control_numicro.h:38