Zephyr API Documentation 4.5.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
barrier.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_SYS_BARRIER_H_
14#define ZEPHYR_INCLUDE_SYS_BARRIER_H_
15
16#include <zephyr/toolchain.h>
17
18#if defined(CONFIG_BARRIER_OPERATIONS_ARCH)
19# if defined(CONFIG_ARM)
20# include <zephyr/arch/arm/barrier.h>
21# elif defined(CONFIG_ARM64)
22# include <zephyr/arch/arm64/barrier.h>
23# elif defined(CONFIG_ARC)
24# include <zephyr/arch/arc/barrier.h>
25# endif
26#elif defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
28#else
29/* No backend is available for this architecture and toolchain combination, so
30 * fall back to a compiler barrier. That keeps the compiler from moving
31 * accesses across the barrier, but it emits no instruction, so nothing
32 * constrains the hardware. Architectures where the ordering matters must
33 * select BARRIER_OPERATIONS_BUILTIN or BARRIER_OPERATIONS_ARCH; the barrier
34 * API must never expand to nothing at all.
35 */
36
37static ALWAYS_INLINE void z_barrier_sync_synchronize(void)
38{
39 compiler_barrier();
40}
41
42static ALWAYS_INLINE void z_barrier_dmem_fence_full(void)
43{
44 compiler_barrier();
45}
46
47static ALWAYS_INLINE void z_barrier_dsync_fence_full(void)
48{
49 compiler_barrier();
50}
51
52static ALWAYS_INLINE void z_barrier_isync_fence_full(void)
53{
54 compiler_barrier();
55}
56#endif
57
58#ifdef __cplusplus
59extern "C" {
60#endif
61
69
81static ALWAYS_INLINE void barrier_sync_synchronize(void)
82{
83 z_barrier_sync_synchronize();
84}
85
96static ALWAYS_INLINE void barrier_dmem_fence_full(void)
97{
98 z_barrier_dmem_fence_full();
99}
100
114static ALWAYS_INLINE void barrier_dsync_fence_full(void)
115{
116 z_barrier_dsync_fence_full();
117}
118
131static ALWAYS_INLINE void barrier_isync_fence_full(void)
132{
133 z_barrier_isync_fence_full();
134}
135
137
138#ifdef __cplusplus
139} /* extern "C" */
140#endif
141
142#endif /* ZEPHYR_INCLUDE_SYS_ATOMIC_H_ */
Compiler-builtin implementation of the memory barrier API.
static ALWAYS_INLINE void barrier_sync_synchronize(void)
Full/sequentially-consistent data memory barrier across cores.
Definition barrier.h:81
static ALWAYS_INLINE void barrier_isync_fence_full(void)
Full/sequentially-consistent instruction synchronization barrier.
Definition barrier.h:131
static ALWAYS_INLINE void barrier_dsync_fence_full(void)
Full/sequentially-consistent data synchronization barrier.
Definition barrier.h:114
static ALWAYS_INLINE void barrier_dmem_fence_full(void)
Full/sequentially-consistent data memory barrier.
Definition barrier.h:96
Macros to abstract toolchain specific capabilities.