Zephyr API Documentation 4.2.99
A Scalable Open Source RTOS
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cache.h
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1/*
2 * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
11
12#ifndef ZEPHYR_INCLUDE_ARCH_CACHE_H_
13#define ZEPHYR_INCLUDE_ARCH_CACHE_H_
14
20
21#if defined(CONFIG_ARM64)
23#elif defined(CONFIG_XTENSA)
25#endif
26
27#include <stddef.h>
28#include <stdbool.h>
29
30#if defined(CONFIG_DCACHE) || defined(__DOXYGEN__)
31
38
39#define cache_data_enable arch_dcache_enable
40
47
48#define cache_data_disable arch_dcache_disable
49
60
61#define cache_data_flush_all arch_dcache_flush_all
62
73
74#define cache_data_invd_all arch_dcache_invd_all
75
86
87#define cache_data_flush_and_invd_all arch_dcache_flush_and_invd_all
88
108int arch_dcache_flush_range(void *addr, size_t size);
109
110#define cache_data_flush_range(addr, size) arch_dcache_flush_range(addr, size)
111
132int arch_dcache_invd_range(void *addr, size_t size);
133
134#define cache_data_invd_range(addr, size) arch_dcache_invd_range(addr, size)
135
156
157int arch_dcache_flush_and_invd_range(void *addr, size_t size);
158
159#define cache_data_flush_and_invd_range(addr, size) \
160 arch_dcache_flush_and_invd_range(addr, size)
161
162#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT) || defined(__DOXYGEN__)
163
178
179#define cache_data_line_size_get arch_dcache_line_size_get
180
181#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT || __DOXYGEN__ */
182
183#endif /* CONFIG_DCACHE || __DOXYGEN__ */
184
185#if defined(CONFIG_ICACHE) || defined(__DOXYGEN__)
186
193
194#define cache_instr_enable arch_icache_enable
195
202
203#define cache_instr_disable arch_icache_disable
204
215
216#define cache_instr_flush_all arch_icache_flush_all
217
228
229#define cache_instr_invd_all arch_icache_invd_all
230
241
242#define cache_instr_flush_and_invd_all arch_icache_flush_and_invd_all
243
263int arch_icache_flush_range(void *addr, size_t size);
264
265#define cache_instr_flush_range(addr, size) arch_icache_flush_range(addr, size)
266
287int arch_icache_invd_range(void *addr, size_t size);
288
289#define cache_instr_invd_range(addr, size) arch_icache_invd_range(addr, size)
290
311int arch_icache_flush_and_invd_range(void *addr, size_t size);
312
313#define cache_instr_flush_and_invd_range(addr, size) \
314 arch_icache_flush_and_invd_range(addr, size)
315
316#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT) || defined(__DOXYGEN__)
317
331
333
334#define cache_instr_line_size_get arch_icache_line_size_get
335
336#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT || __DOXYGEN__ */
337
338#endif /* CONFIG_ICACHE || __DOXYGEN__ */
339
340#if CONFIG_CACHE_DOUBLEMAP || __DOXYGEN__
342#define cache_is_ptr_cached(ptr) arch_cache_is_ptr_cached(ptr)
343
345#define cache_is_ptr_uncached(ptr) arch_cache_is_ptr_uncached(ptr)
346
347void __sparse_cache *arch_cache_cached_ptr_get(void *ptr);
348#define cache_cached_ptr(ptr) arch_cache_cached_ptr_get(ptr)
349
350void *arch_cache_uncached_ptr_get(void __sparse_cache *ptr);
351#define cache_uncached_ptr(ptr) arch_cache_uncached_ptr_get(ptr)
352#endif /* CONFIG_CACHE_DOUBLEMAP */
353
354
356
360
361#endif /* ZEPHYR_INCLUDE_ARCH_CACHE_H_ */
static ALWAYS_INLINE int arch_dcache_flush_range(void *addr, size_t bytes)
Implementation of arch_dcache_flush_range.
Definition cache.h:28
static ALWAYS_INLINE int arch_dcache_flush_and_invd_range(void *addr, size_t bytes)
Implementation of arch_dcache_flush_and_invd_range.
Definition cache.h:44
void arch_dcache_disable(void)
Disable the d-cache.
void arch_icache_disable(void)
Disable the i-cache.
void * arch_cache_uncached_ptr_get(void *ptr)
int arch_dcache_invd_range(void *addr, size_t size)
Invalidate an address range in the d-cache.
int arch_icache_flush_and_invd_all(void)
Flush and Invalidate the i-cache.
int arch_icache_flush_all(void)
Flush the i-cache.
int arch_icache_invd_all(void)
Invalidate the i-cache.
size_t arch_dcache_line_size_get(void)
Get the d-cache line size.
size_t arch_icache_line_size_get(void)
Get the i-cache line size.
int arch_icache_flush_range(void *addr, size_t size)
Flush an address range in the i-cache.
int arch_icache_invd_range(void *addr, size_t size)
Invalidate an address range in the i-cache.
int arch_dcache_flush_all(void)
Flush the d-cache.
bool arch_cache_is_ptr_cached(void *ptr)
int arch_icache_flush_and_invd_range(void *addr, size_t size)
Flush and Invalidate an address range in the i-cache.
bool arch_cache_is_ptr_uncached(void *ptr)
void arch_cache_init(void)
void * arch_cache_cached_ptr_get(void *ptr)
int arch_dcache_flush_and_invd_all(void)
Flush and Invalidate the d-cache.
int arch_dcache_invd_all(void)
Invalidate the d-cache.
void arch_icache_enable(void)
Enable the i-cache.
void arch_dcache_enable(void)
Enable the d-cache.